From 8529ac933e82a900f86a71b58a338461d6027298 Mon Sep 17 00:00:00 2001 From: Julien Grall Date: Fri, 30 Aug 2013 14:30:27 +0100 Subject: [PATCH] xen/arm: Introduce MPIDR_HWID_MASK This define will be use later to retrieve the correct hardware CPU ID. Also replace hardcoded mask in arm32/head.S by this define. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/arm32/head.S | 2 +- xen/include/asm-arm/processor.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index b8334e2d74..79e95b673c 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -98,7 +98,7 @@ past_zImage: beq boot_cpu tst r0, #(1<<30) /* Uniprocessor system? */ bne boot_cpu - bics r12, r0, #(0xff << 24) /* Mask out flags to get CPU ID */ + bics r12, r0, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */ beq boot_cpu /* If we're CPU 0, boot now */ /* Non-boot CPUs wait here to be woken up one at a time. */ diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 1a4f8d17da..808567e5df 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -12,6 +12,7 @@ #define MPIDR_SMP (1 << 31) #define MPIDR_AFF0_SHIFT (0) #define MPIDR_AFF0_MASK (0xff << MPIDR_AFF0_SHIFT) +#define MPIDR_HWID_MASK 0xffffff /* TTBCR Translation Table Base Control Register */ #define TTBCR_EAE 0x80000000 -- 2.30.2